Master of Science in Technology and Design (IC Design, Failure Analysis and Reliability)
The MTD (IC Design, Failure Analysis and Reliability) is a one-year full-time coursework-based Master programme. It comprises eight courses (96 credits): two core design courses and six specialised courses, including a two-month internship in Term 3, organised as follows:
Term 1 (Sep – Dec) | ||
Course Title | Credit Points | Course Type |
Innovation by Design | 12 | Design Core |
Semiconductor Device Technology and Design: Silicon and Beyond | 12 | Specialisation Core |
Digital IC Design | 12 | Specialisation Core |
Term 2 (Jan – Apr) | ||
Course Title | Credit Points | Course Type |
Design Science | 12 | Design Core |
Materials and Design for Semiconductor Technology | 12 | Specialisation Core |
Reliability Engineering and Failure Analysis of Advanced CMOS Devices | 12 | Specialisation Core |
Term 3 (May – Aug) | ||
Course Title | Credit Points | Course Type |
Wafer Fabrication, Defect Characterisations and Yield Enhancement for IC Production | 12 | Specialisation Core |
Advanced Failure Analysis Techniques for Semiconductor Devices | 12 | Specialisation Core |
A two-month internship (Jul – Aug) at Wintech-Nano Technology in Suzhou, China Satisfactory completion of the internship is required to graduate from the programme. |
Course Descriptions
Innovation by Design (Term 1)
The focus of this course is the integration of marketing, design, engineering and manufacturing functions in creating and developing a new product, system or service. The course will go through the different phases of designing a new product, system or service using the four Ds of the four-phase Design Innovation Cycle of “Discover-Define-Develop-Deliver”. The course will focus on some of the critical success factors for new product development, with an early emphasis on design thinking. Students will be given a design challenge to complete.
Semiconductor Device Technology and Design: Silicon and Beyond (Term 1)
This course introduces basic semiconductor device physics and design, semiconductor materials and their applications in semiconductor device technology. Bottleneck of silicon technology at the sub-10-nm regime will be discussed. Additionally, it will introduce new materials and device architectures that may overcome the challenges of silicon technology. Upon completion of this module, students will be familiar with the basic device physics and operation of semiconductor devices as well as understanding on the challenges and prospects of next-generation semiconductor technology.
Digital IC Design (Term 1)
Topics relating to the design and analysis of digital circuits implemented in integrated circuits, including transistor-level design and simulation, combinational and sequential logic, memory circuits, and timing analysis, will be covered. Techniques for testing and verification of digital circuits will also be discussed and there will be hands-on experience with electronic design automation (EDA) tools and integrated circuit (IC) fabrication processes.
Design Science (Term 2)
This course introduces students to design science where many design principles and methods will be reviewed, applied and analysed. Students will learn to make connections between design science and other fields, such as engineering, and how principles in design science can be used to advance these fields. The class will cover a broad set of design methods such as customer needs analysis, methods in creativity, functional modelling, design for X and design for testing and verification.
Materials and Design for Semiconductor Technology (Term 2)
This course covers the use of different TCAD device modelling and simulation software tools to guide in the choice of materials for logic and memory devices and assess the electrical–mechanical–thermal co-design of devices, circuits, and packages through the use of multiphysics simulation tools.
Reliability Engineering and Failure Analysis of Advanced CMOS Devices (Term 2)
The reliability study of advanced complementary metal-oxide semiconductor (CMOS) devices requires detailed study on the working and performance to ensure their usability in electronics industry. The reliability analysis highlighting electrical and physical properties may reveal device performance and reliability concern on the use of these devices in electronics applications. At the end of the course, students will get in-depth knowledge on the reliability and failure mechanisms in CMOS devices and the technical background to identify and solve reliability/failure issues.
Wafer Fabrication, Defect Characterisations and Yield Enhancement for IC Production (Term 3)
Students will learn the processes of wafer fabrication, advanced analysis and characterisation, techniques and instruments for yield enhancement of wafer fabrication.
Advanced Failure Analysis Techniques for Semiconductor Devices (Term 3)
Students will learn the fundamentals of advanced failure analysis techniques in IC design and packages, identify and isolate failures in IC devices using destructive and non-destructive technologies, including EMMI/OBIRCH, Plasma-FIB, nano-probe, 2D/3D x-ray, etc.
A two-month internship at Wintech-Nano Technology (Term 3)
Gain hands-on experience in cutting-edge semiconductor testing and analysis facilities at Wintech-Nano’s premises in Suzhou, China. Internship is not credit-bearing but satisfactory completion is a requirement to graduate from the programme.
Contact Us
For enquiries, please email: MTD@sutd.edu.sg
For applicants residing in China, please email: MTD_CN@sutd.edu.sg
What's next
Find out more
Frequently asked questions
How would I know if I have failed the EWET?
Students who failed the EWET will receive an email from Office of Student Administration(OSA) in week two, informing them that they have been enrolled into the FEP. The email will also include their weekly class timing and lesson venue. Your FEP teacher will also follow up with an email to you. The first FEP class will begin in week three.
What happens if I fail the EWET?
You are not expected to withdraw from SUTD if you fail the EWET. If you fail the EWET, you are required to complete the following:
- Freshmore English Program (term 1)
- Freshmore Communication Program (term 3). FCP is a Pass/Fail module and you will need to pass both in order to graduate from SUTD.
How should I prepare for the EWET?
There is no preparation or studying required. You just have to be present virtually to access the test, read the question carefully and give a logical and coherent written response. Please be reminded that you should write in proper, grammatical sentences and choose a tone which is appropriate.
You are, however, encouraged to read this short book:
William Strunk, Jr. & E. B. White, Elements of Style, 4th Ed. (Allyn & Bacon, 2000).
Are we able to type our answers in our own laptop, given that it is conducted online?
The student should type out their essays on their laptops or PCs since the essays must be submitted online.
Since the test is online, how is the essay submission done?
The student will receive a Word document with the question. Since the essay must be submitted online (through a link provided on eDimension), the student should type out their answers on Word and save it either in .doc, .docx, or .pdf.
Can’t find what you need?